期刊论文

中文

核电子学与探测技术

0258-0934

2009

29

4

760-763,791

10.3969/j.issn.0258-0934.2009.04.014

2008CB317106:国家重大基础研究项目 10875081,10575044,10635020:国家自然科学基金 306022:教育部科学技术研究项目 IPT0624:教育部***和创新团队发展计划项目

本校为第一机构

因为最新研发的250块ALICE/PHOS前端电子学FEE系统板的部分器件在无铅焊接中被部分或完全损坏.为了不影响FEE系统性能,准确定位FFE系统板上与FPGA相关的故障,在对ACEX系列FPGA的配置机制进行深入研究的基础上找到了一种定位FEE系统板故障点的方法.文章着重研究了多器件的JTAG配置、基于EPC系列配置器件的PS配置和FPGA的自动重配置等问题.FEE系统板的大量测试和维修结果证明,该定位方法能准确、快速地定位FEE系统板上与FPGA器件相关的故障点.

Since some devices on the latest developed 250 ALICE/PHOS Front-end electronics（FEE） system eards had been partly or completely damaged during lead-free soldering. To alleviate the influence on the performance of FEE system and to locate fault related FPGA accurately, we should find a method for locating fault of FEE system based on the deep study of FPGA configuration scheme. It emphasized on the problems such as JTAG configuration of mult-devices, PS configuration based on EPC series configuration devices and auto re-configuration of FPGA. ...